x86 Operating Systems: BIOS Interrupt 0x10 to Print a Boot Message

To read disk sectors beyond the boot sector in x86 real mode, use BIOS interrupt 13H with CHS addressing (cylinder-head-sector), where AH=2 specifies the read operation, AL holds the number of sectors to read, CH and CL hold the cylinder and sector numbers respectively, DH holds the head number, DL holds the drive number, and ES:BX points to the memory destination; error checking involves verifying the carry flag and ensuring the correct number of sectors were actually read.

This video tutorial explains how to read disk sectors during the operating system boot process, demonstrating how to use BIOS interrupts to load 512-byte sectors from the hard disk into memory, with specific parameters including sector number, cylinder count, and head position, enabling the system to load the remaining boot code and continue the boot sequence.

The BIOS interrupt 13h with AH=02h is used to read sectors from a disk drive. The parameters required include: AL (number of sectors to read), CH (cylinder number), CL (sector number), DH (head number), DL (drive number), ES:BX (buffer address for receiving data). The function sets up these parameters based on information from the file table entry, then calls the interrupt. After the call, the carry flag indicates success or failure. If successful, the requested sectors are read into memory at the specified buffer address.

This tutorial demonstrates how to implement disk reading functionality in a bootloader using BIOS interrupt 13h, covering the conversion from Logical Block Addressing (LBA) to Cylinder-Head-Sector (CHS) addressing required by BIOS functions, error handling with retry mechanisms, and practical debugging techniques using Bochs emulator. The implementation shows how to read additional operating system modules from floppy disk sectors beyond the initial 512-byte boot sector, enabling the creation of multi-module operating systems.

This segment covers reading the kernel from disk using BIOS interrupt 13h (INT 13h). The interrupt requires setting AH=0x02 (read function), AL=number of sectors, CH=cylinder, CL=sector, DH=head, DL=drive number (0x80 or 0x81), and ES:BX=destination buffer. The kernel is read from the beginning of the disk (cylinder 0, sector 0, head 0) to a memory address calculated using segment:offset addressing. The bootloader checks the carry flag for errors and prints status messages. The kernel is loaded at address 0x2000 (segment 0x200, offset 0x0000). The bootloader then jumps to this address to execute the kernel. Real mode memory addressing uses (segment << 4) + offset to calculate effective addresses.

To transition from 16-bit real mode to 32-bit protected mode, the LGDT instruction is used to load the GDTR. The CR0 register is read, its flags are cleared, and the 32-bit protected mode flag is set. The CR0 register is then written back, and a far jump to the 32-bit code segment is executed. After transitioning to 32-bit protected mode, the segment registers are initialized using the GDT: DS, ES, FS, and GS are set to the 32-bit data segment descriptor, while SS is set to the 32-bit stack segment descriptor. The EBP (Base Pointer) and ESP (Stack Pointer) are set to 0x10000 (64KB). This is necessary because in 32-bit mode, an underflow would jump 4GB instead of 1MB, so the stack must be positioned to use the same memory region as in real mode.

Switching to protected mode requires a systematic 9-step process: (1) Disable interrupts using CLI; (2) Enable A20 gate by programming the keyboard controller (ports 0x64/0x60); (3) Set up GDT with flat memory model entries (base=0, limit=0xFFFF, granularity=4KB); (4) Load GDT using LGDT instruction; (5) Modify CR0 to enable protected mode; (6) Perform far jump to protected mode code segment; (7) Enable paging (optional); (8) Set up LDT (optional); (9) Set up tasking (optional). The critical steps involve disabling interrupts before mode switch, properly configuring the GDT with appropriate descriptors, and performing the far jump to transition execution context. This sequence demonstrates low-level hardware-software interaction required for OS development.

To switch a CPU from 16-bit real mode to 32-bit protected mode, developers must first disable interrupts (CLI), load the Global Descriptor Table (GDT) which defines memory segments with their base addresses, limits, and access permissions, then set the PE bit in the CR0 control register, followed by a far jump to flush the CPU pipeline and ensure execution in 32-bit mode; this transition enables memory protection, privilege levels, and more efficient memory management that modern operating systems require.

The First Stage Boot Loader (FSBL/SBL) is the second program, loaded by Boot ROM into internal RAM. It initializes DDRAM, loads the Main Boot Loader, and transfers control to the next stage. The Main Boot Loader (U-Boot) is the third stage, loaded into DDRAM by FSBL. Written in C, it initializes hardware peripherals (Ethernet, USB, display, storage), loads the kernel image, device tree, and root file system into memory, and prepares the environment for kernel execution. U-Boot handles boot arguments, memory mapping, and the actual transfer of control to the kernel. Different boot commands (bootz, bootm) handle compressed and uncompressed kernel images.

A minimal operating system kernel is built by creating a bootloader that loads the kernel into memory and transfers control to it, where the kernel provides basic functionality like video output to interact with the user; this demonstrates the fundamental architecture of operating systems where the bootloader handles hardware initialization and the kernel manages core system operations.

The boot process involves multiple stages: (1) POST verifies basic hardware components, (2) BIOS initializes hardware and detects devices, (3) BIOS searches for bootable devices and loads the bootloader from the first bootable device, (4) The bootloader loads the operating system kernel into memory and transfers control to it. Hard drives are block devices accessed in sectors/clusters. The first sector contains the bootloader, which reads the partition table to find the bootable partition. The partition table describes where each partition starts and ends. The bootloader is a small program that runs in real mode and is responsible for loading the operating system. It may provide a menu for selecting which operating system to boot (if multiple are installed). The bootloader then loads the appropriate kernel and transfers control to it. The operating system kernel is the core component that manages system resources and provides services to user programs. It handles process scheduling, memory management, device I/O, and inter-process communication. The kernel runs in kernel mode with full access to all system resources.

This section covers integrating all components to load the kernel executable. The video demonstrates combining configuration parsing, file searching, and memory loading into a cohesive workflow. It shows passing parsed kernel paths to find_file(), obtaining metadata, and then using read_file() to load the kernel into allocated memory. The implementation includes error checking to verify the kernel file exists before proceeding. This represents the culmination of previous work, bringing together multiple subsystems to achieve the primary bootloader objective of loading and transferring control to the operating system kernel.

The embedded Linux boot process involves multiple stages: the ROM bootloader (176KB) initializes basic hardware and searches for the first-stage bootloader (MLO/SPL) from a boot device like an SD card; the first-stage bootloader then loads the second-stage bootloader (U-Boot) into RAM, which finally loads the Linux kernel and device tree into memory before passing control to the kernel. This multi-stage approach is necessary because the SOC's internal RAM (128KB) is insufficient to hold the entire U-Boot bootloader, and the ROM bootloader lacks the specific knowledge to configure the RAM controller for different board configurations.

This section covers hardware communication methods and VGA text mode screen implementation. The instructor explains memory-mapped I/O (writing to specific memory addresses like 0xB8000 for video memory) and port I/O (for devices like keyboards and mice). The system.h file provides C interfaces (importB and outputB functions) to hardware ports. The VGA text mode screen is structured as a table with 80 columns and 25 rows, where each cell stores 2 bytes (character and color attribute). The clear_line function clears specific line ranges by setting character and color bytes to zero. The clear_screen function clears the entire screen by calling clear_line with parameters from line 0 to line 24. The cursor_update function calculates the memory address for cursor position using the formula: cursor_y * screen_width + cursor_x, which is sent to hardware ports (0x3D4 and 0x3D5) to position the cursor.

VGA (Video Graphics Array) is a standard for transmitting video signals from computers to monitors, defining resolutions, color modes (RGB), and display interfaces. In x86 architectures, the VGA video memory is located at physical address 0xB8000. The text mode on VGA is divided into 30 columns and 25 lines, totaling 750 character positions. Each character position requires 2 bytes: the first byte contains the character code, and the second byte contains color attributes. For example, printing the letter 'A' in white at position (1,1) requires the byte sequence 0x41 0x07, where 0x41 is the ASCII code for 'A' and 0x07 represents white foreground color.

Video output in protected mode uses direct memory access: (1) Text mode video memory starts at 0xB8000, (2) Each character position requires 2 bytes (1 byte for color attributes, 1 byte for character), (3) Color attributes: 4 bits for background (0-15), 4 bits for foreground (0-15), (4) Default color is 0x07 (black background, light gray foreground), (5) Character position calculation: Address = 0xB8000 + (row × 80 + column) × 2.

Memory-mapped I/O replaces dedicated I/O ports with memory read/write operations, eliminating special I/O instructions. A 256-byte region at memory address 0x0000 is reserved for VGA registers, accommodating nine planned registers. The address map allocates 8KB for the bootloader/stack, 8KB for frame buffer, 8KB for tile data, 4KB for sprite data, 1KB for palette data, and 256 bytes for I/O. This approach provides flexibility but consumes address space and may be slower than dedicated I/O.